# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=tahiti -run-pass=legalizer %s -o - | FileCheck -check-prefix=GFX6 %s
# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=fiji -run-pass=legalizer %s -o - | FileCheck -check-prefix=GFX8 %s

---
name: test_sitofp_s32_to_s32
body: |
  bb.0:
    liveins: $vgpr0

    ; GFX6-LABEL: name: test_sitofp_s32_to_s32
    ; GFX6: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
    ; GFX6: [[SITOFP:%[0-9]+]]:_(s32) = G_SITOFP [[COPY]](s32)
    ; GFX6: $vgpr0 = COPY [[SITOFP]](s32)
    ; GFX8-LABEL: name: test_sitofp_s32_to_s32
    ; GFX8: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
    ; GFX8: [[SITOFP:%[0-9]+]]:_(s32) = G_SITOFP [[COPY]](s32)
    ; GFX8: $vgpr0 = COPY [[SITOFP]](s32)
    %0:_(s32) = COPY $vgpr0
    %1:_(s32) = G_SITOFP %0
    $vgpr0 = COPY %1
...

---
name: test_sitofp_s32_to_s64
body: |
  bb.0:
    liveins: $vgpr0

    ; GFX6-LABEL: name: test_sitofp_s32_to_s64
    ; GFX6: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
    ; GFX6: [[SITOFP:%[0-9]+]]:_(s64) = G_SITOFP [[COPY]](s32)
    ; GFX6: $vgpr0_vgpr1 = COPY [[SITOFP]](s64)
    ; GFX8-LABEL: name: test_sitofp_s32_to_s64
    ; GFX8: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
    ; GFX8: [[SITOFP:%[0-9]+]]:_(s64) = G_SITOFP [[COPY]](s32)
    ; GFX8: $vgpr0_vgpr1 = COPY [[SITOFP]](s64)
    %0:_(s32) = COPY $vgpr0
    %1:_(s64) = G_SITOFP %0
    $vgpr0_vgpr1 = COPY %1
...

---
name: test_sitofp_v2s32_to_v2s32
body: |
  bb.0:
    liveins: $vgpr0_vgpr1

    ; GFX6-LABEL: name: test_sitofp_v2s32_to_v2s32
    ; GFX6: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr0_vgpr1
    ; GFX6: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<2 x s32>)
    ; GFX6: [[SITOFP:%[0-9]+]]:_(s32) = G_SITOFP [[UV]](s32)
    ; GFX6: [[SITOFP1:%[0-9]+]]:_(s32) = G_SITOFP [[UV1]](s32)
    ; GFX6: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[SITOFP]](s32), [[SITOFP1]](s32)
    ; GFX6: $vgpr0_vgpr1 = COPY [[BUILD_VECTOR]](<2 x s32>)
    ; GFX8-LABEL: name: test_sitofp_v2s32_to_v2s32
    ; GFX8: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr0_vgpr1
    ; GFX8: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<2 x s32>)
    ; GFX8: [[SITOFP:%[0-9]+]]:_(s32) = G_SITOFP [[UV]](s32)
    ; GFX8: [[SITOFP1:%[0-9]+]]:_(s32) = G_SITOFP [[UV1]](s32)
    ; GFX8: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[SITOFP]](s32), [[SITOFP1]](s32)
    ; GFX8: $vgpr0_vgpr1 = COPY [[BUILD_VECTOR]](<2 x s32>)
    %0:_(<2 x s32>) = COPY $vgpr0_vgpr1
    %1:_(<2 x s32>) = G_SITOFP %0
    $vgpr0_vgpr1 = COPY %1
...

---
name: test_sitofp_v2s32_to_v2s64
body: |
  bb.0:
    liveins: $vgpr0_vgpr1

    ; GFX6-LABEL: name: test_sitofp_v2s32_to_v2s64
    ; GFX6: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr0_vgpr1
    ; GFX6: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<2 x s32>)
    ; GFX6: [[SITOFP:%[0-9]+]]:_(s64) = G_SITOFP [[UV]](s32)
    ; GFX6: [[SITOFP1:%[0-9]+]]:_(s64) = G_SITOFP [[UV1]](s32)
    ; GFX6: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[SITOFP]](s64), [[SITOFP1]](s64)
    ; GFX6: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<2 x s64>)
    ; GFX8-LABEL: name: test_sitofp_v2s32_to_v2s64
    ; GFX8: [[COPY:%[0-9]+]]:_(<2 x s32>) = COPY $vgpr0_vgpr1
    ; GFX8: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](<2 x s32>)
    ; GFX8: [[SITOFP:%[0-9]+]]:_(s64) = G_SITOFP [[UV]](s32)
    ; GFX8: [[SITOFP1:%[0-9]+]]:_(s64) = G_SITOFP [[UV1]](s32)
    ; GFX8: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s64>) = G_BUILD_VECTOR [[SITOFP]](s64), [[SITOFP1]](s64)
    ; GFX8: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<2 x s64>)
    %0:_(<2 x s32>) = COPY $vgpr0_vgpr1
    %1:_(<2 x s64>) = G_SITOFP %0
    $vgpr0_vgpr1_vgpr2_vgpr3 = COPY %1
...

---
name: test_sitofp_s64_to_s32
body: |
  bb.0:
    liveins: $vgpr0_vgpr1

    ; GFX6-LABEL: name: test_sitofp_s64_to_s32
    ; GFX6: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1
    ; GFX6: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](s64)
    ; GFX6: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 32
    ; GFX6: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
    ; GFX6: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 31
    ; GFX6: [[XOR:%[0-9]+]]:_(s32) = G_XOR [[UV]], [[UV1]]
    ; GFX6: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[XOR]], [[C2]](s32)
    ; GFX6: [[ADD:%[0-9]+]]:_(s32) = G_ADD [[C]], [[ASHR]]
    ; GFX6: [[INT:%[0-9]+]]:_(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.sffbh), [[UV1]](s32)
    ; GFX6: [[SUB:%[0-9]+]]:_(s32) = G_SUB [[INT]], [[C1]]
    ; GFX6: [[UMIN:%[0-9]+]]:_(s32) = G_UMIN [[SUB]], [[ADD]]
    ; GFX6: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[COPY]], [[UMIN]](s32)
    ; GFX6: [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[SHL]](s64)
    ; GFX6: [[UMIN1:%[0-9]+]]:_(s32) = G_UMIN [[C1]], [[UV2]]
    ; GFX6: [[OR:%[0-9]+]]:_(s32) = G_OR [[UV3]], [[UMIN1]]
    ; GFX6: [[SITOFP:%[0-9]+]]:_(s32) = G_SITOFP [[OR]](s32)
    ; GFX6: [[SUB1:%[0-9]+]]:_(s32) = G_SUB [[C]], [[UMIN]]
    ; GFX6: [[INT1:%[0-9]+]]:_(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.ldexp), [[SITOFP]](s32), [[SUB1]](s32)
    ; GFX6: $vgpr0 = COPY [[INT1]](s32)
    ; GFX8-LABEL: name: test_sitofp_s64_to_s32
    ; GFX8: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1
    ; GFX8: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](s64)
    ; GFX8: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 32
    ; GFX8: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
    ; GFX8: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 31
    ; GFX8: [[XOR:%[0-9]+]]:_(s32) = G_XOR [[UV]], [[UV1]]
    ; GFX8: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[XOR]], [[C2]](s32)
    ; GFX8: [[ADD:%[0-9]+]]:_(s32) = G_ADD [[C]], [[ASHR]]
    ; GFX8: [[INT:%[0-9]+]]:_(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.sffbh), [[UV1]](s32)
    ; GFX8: [[SUB:%[0-9]+]]:_(s32) = G_SUB [[INT]], [[C1]]
    ; GFX8: [[UMIN:%[0-9]+]]:_(s32) = G_UMIN [[SUB]], [[ADD]]
    ; GFX8: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[COPY]], [[UMIN]](s32)
    ; GFX8: [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[SHL]](s64)
    ; GFX8: [[UMIN1:%[0-9]+]]:_(s32) = G_UMIN [[C1]], [[UV2]]
    ; GFX8: [[OR:%[0-9]+]]:_(s32) = G_OR [[UV3]], [[UMIN1]]
    ; GFX8: [[SITOFP:%[0-9]+]]:_(s32) = G_SITOFP [[OR]](s32)
    ; GFX8: [[SUB1:%[0-9]+]]:_(s32) = G_SUB [[C]], [[UMIN]]
    ; GFX8: [[INT1:%[0-9]+]]:_(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.ldexp), [[SITOFP]](s32), [[SUB1]](s32)
    ; GFX8: $vgpr0 = COPY [[INT1]](s32)
    %0:_(s64) = COPY $vgpr0_vgpr1
    %1:_(s32) = G_SITOFP %0
    $vgpr0 = COPY %1
...

---
name: test_sitofp_s64_to_s64
body: |
  bb.0:
    liveins: $vgpr0_vgpr1

    ; GFX6-LABEL: name: test_sitofp_s64_to_s64
    ; GFX6: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1
    ; GFX6: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](s64)
    ; GFX6: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 32
    ; GFX6: [[SITOFP:%[0-9]+]]:_(s64) = G_SITOFP [[UV1]](s32)
    ; GFX6: [[UITOFP:%[0-9]+]]:_(s64) = G_UITOFP [[UV]](s32)
    ; GFX6: [[INT:%[0-9]+]]:_(s64) = G_INTRINSIC intrinsic(@llvm.amdgcn.ldexp), [[SITOFP]](s64), [[C]](s32)
    ; GFX6: [[FADD:%[0-9]+]]:_(s64) = G_FADD [[INT]], [[UITOFP]]
    ; GFX6: $vgpr0_vgpr1 = COPY [[FADD]](s64)
    ; GFX8-LABEL: name: test_sitofp_s64_to_s64
    ; GFX8: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1
    ; GFX8: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](s64)
    ; GFX8: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 32
    ; GFX8: [[SITOFP:%[0-9]+]]:_(s64) = G_SITOFP [[UV1]](s32)
    ; GFX8: [[UITOFP:%[0-9]+]]:_(s64) = G_UITOFP [[UV]](s32)
    ; GFX8: [[INT:%[0-9]+]]:_(s64) = G_INTRINSIC intrinsic(@llvm.amdgcn.ldexp), [[SITOFP]](s64), [[C]](s32)
    ; GFX8: [[FADD:%[0-9]+]]:_(s64) = G_FADD [[INT]], [[UITOFP]]
    ; GFX8: $vgpr0_vgpr1 = COPY [[FADD]](s64)
    %0:_(s64) = COPY $vgpr0_vgpr1
    %1:_(s64) = G_SITOFP %0
    $vgpr0_vgpr1 = COPY %1
...

---
name: test_sitofp_s16_to_s16
body: |
  bb.0:
    liveins: $vgpr0

    ; GFX6-LABEL: name: test_sitofp_s16_to_s16
    ; GFX6: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
    ; GFX6: [[COPY1:%[0-9]+]]:_(s32) = COPY [[COPY]](s32)
    ; GFX6: [[SEXT_INREG:%[0-9]+]]:_(s32) = G_SEXT_INREG [[COPY1]], 16
    ; GFX6: [[SITOFP:%[0-9]+]]:_(s16) = G_SITOFP [[SEXT_INREG]](s32)
    ; GFX6: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[SITOFP]](s16)
    ; GFX6: $vgpr0 = COPY [[ANYEXT]](s32)
    ; GFX8-LABEL: name: test_sitofp_s16_to_s16
    ; GFX8: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
    ; GFX8: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32)
    ; GFX8: [[SITOFP:%[0-9]+]]:_(s16) = G_SITOFP [[TRUNC]](s16)
    ; GFX8: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[SITOFP]](s16)
    ; GFX8: $vgpr0 = COPY [[ANYEXT]](s32)
    %0:_(s32) = COPY $vgpr0
    %1:_(s16) = G_TRUNC %0
    %2:_(s16) = G_SITOFP %1
    %3:_(s32) = G_ANYEXT %2
    $vgpr0 = COPY %3
...

---
name: test_sitofp_s16_to_s32
body: |
  bb.0:
    liveins: $vgpr0

    ; GFX6-LABEL: name: test_sitofp_s16_to_s32
    ; GFX6: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
    ; GFX6: [[COPY1:%[0-9]+]]:_(s32) = COPY [[COPY]](s32)
    ; GFX6: [[SEXT_INREG:%[0-9]+]]:_(s32) = G_SEXT_INREG [[COPY1]], 16
    ; GFX6: [[SITOFP:%[0-9]+]]:_(s32) = G_SITOFP [[SEXT_INREG]](s32)
    ; GFX6: $vgpr0 = COPY [[SITOFP]](s32)
    ; GFX8-LABEL: name: test_sitofp_s16_to_s32
    ; GFX8: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
    ; GFX8: [[COPY1:%[0-9]+]]:_(s32) = COPY [[COPY]](s32)
    ; GFX8: [[SEXT_INREG:%[0-9]+]]:_(s32) = G_SEXT_INREG [[COPY1]], 16
    ; GFX8: [[SITOFP:%[0-9]+]]:_(s32) = G_SITOFP [[SEXT_INREG]](s32)
    ; GFX8: $vgpr0 = COPY [[SITOFP]](s32)
    %0:_(s32) = COPY $vgpr0
    %1:_(s16) = G_TRUNC %0
    %2:_(s32) = G_SITOFP %1
    $vgpr0 = COPY %2
...

---
name: test_sitofp_s16_to_s64
body: |
  bb.0:
    liveins: $vgpr0

    ; GFX6-LABEL: name: test_sitofp_s16_to_s64
    ; GFX6: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
    ; GFX6: [[COPY1:%[0-9]+]]:_(s32) = COPY [[COPY]](s32)
    ; GFX6: [[SEXT_INREG:%[0-9]+]]:_(s32) = G_SEXT_INREG [[COPY1]], 16
    ; GFX6: [[SITOFP:%[0-9]+]]:_(s64) = G_SITOFP [[SEXT_INREG]](s32)
    ; GFX6: $vgpr0_vgpr1 = COPY [[SITOFP]](s64)
    ; GFX8-LABEL: name: test_sitofp_s16_to_s64
    ; GFX8: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
    ; GFX8: [[COPY1:%[0-9]+]]:_(s32) = COPY [[COPY]](s32)
    ; GFX8: [[SEXT_INREG:%[0-9]+]]:_(s32) = G_SEXT_INREG [[COPY1]], 16
    ; GFX8: [[SITOFP:%[0-9]+]]:_(s64) = G_SITOFP [[SEXT_INREG]](s32)
    ; GFX8: $vgpr0_vgpr1 = COPY [[SITOFP]](s64)
    %0:_(s32) = COPY $vgpr0
    %1:_(s16) = G_TRUNC %0
    %2:_(s64) = G_SITOFP %1
    $vgpr0_vgpr1 = COPY %2
...

---
name: test_sitofp_s8_to_s16
body: |
  bb.0:
    liveins: $vgpr0

    ; GFX6-LABEL: name: test_sitofp_s8_to_s16
    ; GFX6: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
    ; GFX6: [[COPY1:%[0-9]+]]:_(s32) = COPY [[COPY]](s32)
    ; GFX6: [[SEXT_INREG:%[0-9]+]]:_(s32) = G_SEXT_INREG [[COPY1]], 8
    ; GFX6: [[SITOFP:%[0-9]+]]:_(s16) = G_SITOFP [[SEXT_INREG]](s32)
    ; GFX6: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[SITOFP]](s16)
    ; GFX6: $vgpr0 = COPY [[ANYEXT]](s32)
    ; GFX8-LABEL: name: test_sitofp_s8_to_s16
    ; GFX8: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
    ; GFX8: [[COPY1:%[0-9]+]]:_(s32) = COPY [[COPY]](s32)
    ; GFX8: [[SEXT_INREG:%[0-9]+]]:_(s32) = G_SEXT_INREG [[COPY1]], 8
    ; GFX8: [[SITOFP:%[0-9]+]]:_(s16) = G_SITOFP [[SEXT_INREG]](s32)
    ; GFX8: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[SITOFP]](s16)
    ; GFX8: $vgpr0 = COPY [[ANYEXT]](s32)
    %0:_(s32) = COPY $vgpr0
    %1:_(s8) = G_TRUNC %0
    %2:_(s16) = G_SITOFP %1
    %3:_(s32) = G_ANYEXT %2
    $vgpr0 = COPY %3
...

---
name: test_sitofp_s8_to_s32
body: |
  bb.0:
    liveins: $vgpr0

    ; GFX6-LABEL: name: test_sitofp_s8_to_s32
    ; GFX6: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
    ; GFX6: [[COPY1:%[0-9]+]]:_(s32) = COPY [[COPY]](s32)
    ; GFX6: [[SEXT_INREG:%[0-9]+]]:_(s32) = G_SEXT_INREG [[COPY1]], 8
    ; GFX6: [[SITOFP:%[0-9]+]]:_(s32) = G_SITOFP [[SEXT_INREG]](s32)
    ; GFX6: $vgpr0 = COPY [[SITOFP]](s32)
    ; GFX8-LABEL: name: test_sitofp_s8_to_s32
    ; GFX8: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
    ; GFX8: [[COPY1:%[0-9]+]]:_(s32) = COPY [[COPY]](s32)
    ; GFX8: [[SEXT_INREG:%[0-9]+]]:_(s32) = G_SEXT_INREG [[COPY1]], 8
    ; GFX8: [[SITOFP:%[0-9]+]]:_(s32) = G_SITOFP [[SEXT_INREG]](s32)
    ; GFX8: $vgpr0 = COPY [[SITOFP]](s32)
    %0:_(s32) = COPY $vgpr0
    %1:_(s8) = G_TRUNC %0
    %2:_(s32) = G_SITOFP %1
    $vgpr0 = COPY %2
...

---
name: test_sitofp_s8_to_s64
body: |
  bb.0:
    liveins: $vgpr0

    ; GFX6-LABEL: name: test_sitofp_s8_to_s64
    ; GFX6: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
    ; GFX6: [[COPY1:%[0-9]+]]:_(s32) = COPY [[COPY]](s32)
    ; GFX6: [[SEXT_INREG:%[0-9]+]]:_(s32) = G_SEXT_INREG [[COPY1]], 8
    ; GFX6: [[SITOFP:%[0-9]+]]:_(s64) = G_SITOFP [[SEXT_INREG]](s32)
    ; GFX6: $vgpr0_vgpr1 = COPY [[SITOFP]](s64)
    ; GFX8-LABEL: name: test_sitofp_s8_to_s64
    ; GFX8: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
    ; GFX8: [[COPY1:%[0-9]+]]:_(s32) = COPY [[COPY]](s32)
    ; GFX8: [[SEXT_INREG:%[0-9]+]]:_(s32) = G_SEXT_INREG [[COPY1]], 8
    ; GFX8: [[SITOFP:%[0-9]+]]:_(s64) = G_SITOFP [[SEXT_INREG]](s32)
    ; GFX8: $vgpr0_vgpr1 = COPY [[SITOFP]](s64)
    %0:_(s32) = COPY $vgpr0
    %1:_(s8) = G_TRUNC %0
    %2:_(s64) = G_SITOFP %1
    $vgpr0_vgpr1 = COPY %2
...

---
name: test_sitofp_s1_to_s16
body: |
  bb.0:
    liveins: $vgpr0

    ; GFX6-LABEL: name: test_sitofp_s1_to_s16
    ; GFX6: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
    ; GFX6: [[TRUNC:%[0-9]+]]:_(s1) = G_TRUNC [[COPY]](s32)
    ; GFX6: [[C:%[0-9]+]]:_(s16) = G_FCONSTANT half 0xHBC00
    ; GFX6: [[C1:%[0-9]+]]:_(s16) = G_FCONSTANT half 0xH0000
    ; GFX6: [[SELECT:%[0-9]+]]:_(s16) = G_SELECT [[TRUNC]](s1), [[C]], [[C1]]
    ; GFX6: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[SELECT]](s16)
    ; GFX6: $vgpr0 = COPY [[ANYEXT]](s32)
    ; GFX8-LABEL: name: test_sitofp_s1_to_s16
    ; GFX8: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
    ; GFX8: [[TRUNC:%[0-9]+]]:_(s1) = G_TRUNC [[COPY]](s32)
    ; GFX8: [[C:%[0-9]+]]:_(s16) = G_FCONSTANT half 0xHBC00
    ; GFX8: [[C1:%[0-9]+]]:_(s16) = G_FCONSTANT half 0xH0000
    ; GFX8: [[SELECT:%[0-9]+]]:_(s16) = G_SELECT [[TRUNC]](s1), [[C]], [[C1]]
    ; GFX8: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[SELECT]](s16)
    ; GFX8: $vgpr0 = COPY [[ANYEXT]](s32)
    %0:_(s32) = COPY $vgpr0
    %1:_(s1) = G_TRUNC %0
    %2:_(s16) = G_SITOFP %1
    %3:_(s32) = G_ANYEXT %2
    $vgpr0 = COPY %3
...

---
name: test_sitofp_s1_to_s32
body: |
  bb.0:
    liveins: $vgpr0

    ; GFX6-LABEL: name: test_sitofp_s1_to_s32
    ; GFX6: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
    ; GFX6: [[TRUNC:%[0-9]+]]:_(s1) = G_TRUNC [[COPY]](s32)
    ; GFX6: [[C:%[0-9]+]]:_(s32) = G_FCONSTANT float -1.000000e+00
    ; GFX6: [[C1:%[0-9]+]]:_(s32) = G_FCONSTANT float 0.000000e+00
    ; GFX6: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[TRUNC]](s1), [[C]], [[C1]]
    ; GFX6: $vgpr0 = COPY [[SELECT]](s32)
    ; GFX8-LABEL: name: test_sitofp_s1_to_s32
    ; GFX8: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
    ; GFX8: [[TRUNC:%[0-9]+]]:_(s1) = G_TRUNC [[COPY]](s32)
    ; GFX8: [[C:%[0-9]+]]:_(s32) = G_FCONSTANT float -1.000000e+00
    ; GFX8: [[C1:%[0-9]+]]:_(s32) = G_FCONSTANT float 0.000000e+00
    ; GFX8: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[TRUNC]](s1), [[C]], [[C1]]
    ; GFX8: $vgpr0 = COPY [[SELECT]](s32)
    %0:_(s32) = COPY $vgpr0
    %1:_(s1) = G_TRUNC %0
    %2:_(s32) = G_SITOFP %1
    $vgpr0 = COPY %2
...

---
name: test_sitofp_s1_to_s64
body: |
  bb.0:
    liveins: $vgpr0

    ; GFX6-LABEL: name: test_sitofp_s1_to_s64
    ; GFX6: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
    ; GFX6: [[TRUNC:%[0-9]+]]:_(s1) = G_TRUNC [[COPY]](s32)
    ; GFX6: [[C:%[0-9]+]]:_(s64) = G_FCONSTANT double -1.000000e+00
    ; GFX6: [[C1:%[0-9]+]]:_(s64) = G_FCONSTANT double 0.000000e+00
    ; GFX6: [[SELECT:%[0-9]+]]:_(s64) = G_SELECT [[TRUNC]](s1), [[C]], [[C1]]
    ; GFX6: $vgpr0_vgpr1 = COPY [[SELECT]](s64)
    ; GFX8-LABEL: name: test_sitofp_s1_to_s64
    ; GFX8: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
    ; GFX8: [[TRUNC:%[0-9]+]]:_(s1) = G_TRUNC [[COPY]](s32)
    ; GFX8: [[C:%[0-9]+]]:_(s64) = G_FCONSTANT double -1.000000e+00
    ; GFX8: [[C1:%[0-9]+]]:_(s64) = G_FCONSTANT double 0.000000e+00
    ; GFX8: [[SELECT:%[0-9]+]]:_(s64) = G_SELECT [[TRUNC]](s1), [[C]], [[C1]]
    ; GFX8: $vgpr0_vgpr1 = COPY [[SELECT]](s64)
    %0:_(s32) = COPY $vgpr0
    %1:_(s1) = G_TRUNC %0
    %2:_(s64) = G_SITOFP %1
    $vgpr0_vgpr1 = COPY %2
...

---
name: test_sitofp_s33_to_s32
body: |
  bb.0:
    liveins: $vgpr0_vgpr1

    ; GFX6-LABEL: name: test_sitofp_s33_to_s32
    ; GFX6: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1
    ; GFX6: [[COPY1:%[0-9]+]]:_(s64) = COPY [[COPY]](s64)
    ; GFX6: [[SEXT_INREG:%[0-9]+]]:_(s64) = G_SEXT_INREG [[COPY1]], 33
    ; GFX6: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[SEXT_INREG]](s64)
    ; GFX6: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 32
    ; GFX6: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
    ; GFX6: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 31
    ; GFX6: [[XOR:%[0-9]+]]:_(s32) = G_XOR [[UV]], [[UV1]]
    ; GFX6: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[XOR]], [[C2]](s32)
    ; GFX6: [[ADD:%[0-9]+]]:_(s32) = G_ADD [[C]], [[ASHR]]
    ; GFX6: [[INT:%[0-9]+]]:_(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.sffbh), [[UV1]](s32)
    ; GFX6: [[SUB:%[0-9]+]]:_(s32) = G_SUB [[INT]], [[C1]]
    ; GFX6: [[UMIN:%[0-9]+]]:_(s32) = G_UMIN [[SUB]], [[ADD]]
    ; GFX6: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[SEXT_INREG]], [[UMIN]](s32)
    ; GFX6: [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[SHL]](s64)
    ; GFX6: [[UMIN1:%[0-9]+]]:_(s32) = G_UMIN [[C1]], [[UV2]]
    ; GFX6: [[OR:%[0-9]+]]:_(s32) = G_OR [[UV3]], [[UMIN1]]
    ; GFX6: [[SITOFP:%[0-9]+]]:_(s32) = G_SITOFP [[OR]](s32)
    ; GFX6: [[SUB1:%[0-9]+]]:_(s32) = G_SUB [[C]], [[UMIN]]
    ; GFX6: [[INT1:%[0-9]+]]:_(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.ldexp), [[SITOFP]](s32), [[SUB1]](s32)
    ; GFX6: $vgpr0 = COPY [[INT1]](s32)
    ; GFX8-LABEL: name: test_sitofp_s33_to_s32
    ; GFX8: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1
    ; GFX8: [[COPY1:%[0-9]+]]:_(s64) = COPY [[COPY]](s64)
    ; GFX8: [[SEXT_INREG:%[0-9]+]]:_(s64) = G_SEXT_INREG [[COPY1]], 33
    ; GFX8: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[SEXT_INREG]](s64)
    ; GFX8: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 32
    ; GFX8: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
    ; GFX8: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 31
    ; GFX8: [[XOR:%[0-9]+]]:_(s32) = G_XOR [[UV]], [[UV1]]
    ; GFX8: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[XOR]], [[C2]](s32)
    ; GFX8: [[ADD:%[0-9]+]]:_(s32) = G_ADD [[C]], [[ASHR]]
    ; GFX8: [[INT:%[0-9]+]]:_(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.sffbh), [[UV1]](s32)
    ; GFX8: [[SUB:%[0-9]+]]:_(s32) = G_SUB [[INT]], [[C1]]
    ; GFX8: [[UMIN:%[0-9]+]]:_(s32) = G_UMIN [[SUB]], [[ADD]]
    ; GFX8: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[SEXT_INREG]], [[UMIN]](s32)
    ; GFX8: [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[SHL]](s64)
    ; GFX8: [[UMIN1:%[0-9]+]]:_(s32) = G_UMIN [[C1]], [[UV2]]
    ; GFX8: [[OR:%[0-9]+]]:_(s32) = G_OR [[UV3]], [[UMIN1]]
    ; GFX8: [[SITOFP:%[0-9]+]]:_(s32) = G_SITOFP [[OR]](s32)
    ; GFX8: [[SUB1:%[0-9]+]]:_(s32) = G_SUB [[C]], [[UMIN]]
    ; GFX8: [[INT1:%[0-9]+]]:_(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.ldexp), [[SITOFP]](s32), [[SUB1]](s32)
    ; GFX8: $vgpr0 = COPY [[INT1]](s32)
    %0:_(s64) = COPY $vgpr0_vgpr1
    %1:_(s33) = G_TRUNC %0
    %2:_(s32) = G_SITOFP %1
    $vgpr0 = COPY %2
...

---
name: test_sitofp_s64_to_s16
body: |
  bb.0:
    liveins: $vgpr0_vgpr1

    ; GFX6-LABEL: name: test_sitofp_s64_to_s16
    ; GFX6: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1
    ; GFX6: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](s64)
    ; GFX6: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 32
    ; GFX6: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
    ; GFX6: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 31
    ; GFX6: [[XOR:%[0-9]+]]:_(s32) = G_XOR [[UV]], [[UV1]]
    ; GFX6: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[XOR]], [[C2]](s32)
    ; GFX6: [[ADD:%[0-9]+]]:_(s32) = G_ADD [[C]], [[ASHR]]
    ; GFX6: [[INT:%[0-9]+]]:_(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.sffbh), [[UV1]](s32)
    ; GFX6: [[SUB:%[0-9]+]]:_(s32) = G_SUB [[INT]], [[C1]]
    ; GFX6: [[UMIN:%[0-9]+]]:_(s32) = G_UMIN [[SUB]], [[ADD]]
    ; GFX6: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[COPY]], [[UMIN]](s32)
    ; GFX6: [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[SHL]](s64)
    ; GFX6: [[UMIN1:%[0-9]+]]:_(s32) = G_UMIN [[C1]], [[UV2]]
    ; GFX6: [[OR:%[0-9]+]]:_(s32) = G_OR [[UV3]], [[UMIN1]]
    ; GFX6: [[SITOFP:%[0-9]+]]:_(s32) = G_SITOFP [[OR]](s32)
    ; GFX6: [[SUB1:%[0-9]+]]:_(s32) = G_SUB [[C]], [[UMIN]]
    ; GFX6: [[INT1:%[0-9]+]]:_(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.ldexp), [[SITOFP]](s32), [[SUB1]](s32)
    ; GFX6: [[FPTRUNC:%[0-9]+]]:_(s16) = G_FPTRUNC [[INT1]](s32)
    ; GFX6: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[FPTRUNC]](s16)
    ; GFX6: $vgpr0 = COPY [[ANYEXT]](s32)
    ; GFX8-LABEL: name: test_sitofp_s64_to_s16
    ; GFX8: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1
    ; GFX8: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[COPY]](s64)
    ; GFX8: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 32
    ; GFX8: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
    ; GFX8: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 31
    ; GFX8: [[XOR:%[0-9]+]]:_(s32) = G_XOR [[UV]], [[UV1]]
    ; GFX8: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[XOR]], [[C2]](s32)
    ; GFX8: [[ADD:%[0-9]+]]:_(s32) = G_ADD [[C]], [[ASHR]]
    ; GFX8: [[INT:%[0-9]+]]:_(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.sffbh), [[UV1]](s32)
    ; GFX8: [[SUB:%[0-9]+]]:_(s32) = G_SUB [[INT]], [[C1]]
    ; GFX8: [[UMIN:%[0-9]+]]:_(s32) = G_UMIN [[SUB]], [[ADD]]
    ; GFX8: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[COPY]], [[UMIN]](s32)
    ; GFX8: [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[SHL]](s64)
    ; GFX8: [[UMIN1:%[0-9]+]]:_(s32) = G_UMIN [[C1]], [[UV2]]
    ; GFX8: [[OR:%[0-9]+]]:_(s32) = G_OR [[UV3]], [[UMIN1]]
    ; GFX8: [[SITOFP:%[0-9]+]]:_(s32) = G_SITOFP [[OR]](s32)
    ; GFX8: [[SUB1:%[0-9]+]]:_(s32) = G_SUB [[C]], [[UMIN]]
    ; GFX8: [[INT1:%[0-9]+]]:_(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.ldexp), [[SITOFP]](s32), [[SUB1]](s32)
    ; GFX8: [[FPTRUNC:%[0-9]+]]:_(s16) = G_FPTRUNC [[INT1]](s32)
    ; GFX8: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[FPTRUNC]](s16)
    ; GFX8: $vgpr0 = COPY [[ANYEXT]](s32)
    %0:_(s64) = COPY $vgpr0_vgpr1
    %1:_(s16) = G_SITOFP %0
    %2:_(s32) = G_ANYEXT %1
    $vgpr0 = COPY %2
...

---
name: test_sitofp_v2s64_to_v2s16
body: |
  bb.0:
    liveins: $vgpr0_vgpr1_vgpr2_vgpr3

    ; GFX6-LABEL: name: test_sitofp_v2s64_to_v2s16
    ; GFX6: [[COPY:%[0-9]+]]:_(<2 x s64>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
    ; GFX6: [[UV:%[0-9]+]]:_(s64), [[UV1:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[COPY]](<2 x s64>)
    ; GFX6: [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[UV]](s64)
    ; GFX6: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 32
    ; GFX6: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
    ; GFX6: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 31
    ; GFX6: [[XOR:%[0-9]+]]:_(s32) = G_XOR [[UV2]], [[UV3]]
    ; GFX6: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[XOR]], [[C2]](s32)
    ; GFX6: [[ADD:%[0-9]+]]:_(s32) = G_ADD [[C]], [[ASHR]]
    ; GFX6: [[INT:%[0-9]+]]:_(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.sffbh), [[UV3]](s32)
    ; GFX6: [[SUB:%[0-9]+]]:_(s32) = G_SUB [[INT]], [[C1]]
    ; GFX6: [[UMIN:%[0-9]+]]:_(s32) = G_UMIN [[SUB]], [[ADD]]
    ; GFX6: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[UV]], [[UMIN]](s32)
    ; GFX6: [[UV4:%[0-9]+]]:_(s32), [[UV5:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[SHL]](s64)
    ; GFX6: [[UMIN1:%[0-9]+]]:_(s32) = G_UMIN [[C1]], [[UV4]]
    ; GFX6: [[OR:%[0-9]+]]:_(s32) = G_OR [[UV5]], [[UMIN1]]
    ; GFX6: [[SITOFP:%[0-9]+]]:_(s32) = G_SITOFP [[OR]](s32)
    ; GFX6: [[SUB1:%[0-9]+]]:_(s32) = G_SUB [[C]], [[UMIN]]
    ; GFX6: [[INT1:%[0-9]+]]:_(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.ldexp), [[SITOFP]](s32), [[SUB1]](s32)
    ; GFX6: [[FPTRUNC:%[0-9]+]]:_(s16) = G_FPTRUNC [[INT1]](s32)
    ; GFX6: [[UV6:%[0-9]+]]:_(s32), [[UV7:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[UV1]](s64)
    ; GFX6: [[XOR1:%[0-9]+]]:_(s32) = G_XOR [[UV6]], [[UV7]]
    ; GFX6: [[ASHR1:%[0-9]+]]:_(s32) = G_ASHR [[XOR1]], [[C2]](s32)
    ; GFX6: [[ADD1:%[0-9]+]]:_(s32) = G_ADD [[C]], [[ASHR1]]
    ; GFX6: [[INT2:%[0-9]+]]:_(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.sffbh), [[UV7]](s32)
    ; GFX6: [[SUB2:%[0-9]+]]:_(s32) = G_SUB [[INT2]], [[C1]]
    ; GFX6: [[UMIN2:%[0-9]+]]:_(s32) = G_UMIN [[SUB2]], [[ADD1]]
    ; GFX6: [[SHL1:%[0-9]+]]:_(s64) = G_SHL [[UV1]], [[UMIN2]](s32)
    ; GFX6: [[UV8:%[0-9]+]]:_(s32), [[UV9:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[SHL1]](s64)
    ; GFX6: [[UMIN3:%[0-9]+]]:_(s32) = G_UMIN [[C1]], [[UV8]]
    ; GFX6: [[OR1:%[0-9]+]]:_(s32) = G_OR [[UV9]], [[UMIN3]]
    ; GFX6: [[SITOFP1:%[0-9]+]]:_(s32) = G_SITOFP [[OR1]](s32)
    ; GFX6: [[SUB3:%[0-9]+]]:_(s32) = G_SUB [[C]], [[UMIN2]]
    ; GFX6: [[INT3:%[0-9]+]]:_(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.ldexp), [[SITOFP1]](s32), [[SUB3]](s32)
    ; GFX6: [[FPTRUNC1:%[0-9]+]]:_(s16) = G_FPTRUNC [[INT3]](s32)
    ; GFX6: [[ZEXT:%[0-9]+]]:_(s32) = G_ZEXT [[FPTRUNC]](s16)
    ; GFX6: [[ZEXT1:%[0-9]+]]:_(s32) = G_ZEXT [[FPTRUNC1]](s16)
    ; GFX6: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
    ; GFX6: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[ZEXT1]], [[C3]](s32)
    ; GFX6: [[OR2:%[0-9]+]]:_(s32) = G_OR [[ZEXT]], [[SHL2]]
    ; GFX6: [[BITCAST:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR2]](s32)
    ; GFX6: $vgpr0 = COPY [[BITCAST]](<2 x s16>)
    ; GFX8-LABEL: name: test_sitofp_v2s64_to_v2s16
    ; GFX8: [[COPY:%[0-9]+]]:_(<2 x s64>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
    ; GFX8: [[UV:%[0-9]+]]:_(s64), [[UV1:%[0-9]+]]:_(s64) = G_UNMERGE_VALUES [[COPY]](<2 x s64>)
    ; GFX8: [[UV2:%[0-9]+]]:_(s32), [[UV3:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[UV]](s64)
    ; GFX8: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 32
    ; GFX8: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
    ; GFX8: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 31
    ; GFX8: [[XOR:%[0-9]+]]:_(s32) = G_XOR [[UV2]], [[UV3]]
    ; GFX8: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[XOR]], [[C2]](s32)
    ; GFX8: [[ADD:%[0-9]+]]:_(s32) = G_ADD [[C]], [[ASHR]]
    ; GFX8: [[INT:%[0-9]+]]:_(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.sffbh), [[UV3]](s32)
    ; GFX8: [[SUB:%[0-9]+]]:_(s32) = G_SUB [[INT]], [[C1]]
    ; GFX8: [[UMIN:%[0-9]+]]:_(s32) = G_UMIN [[SUB]], [[ADD]]
    ; GFX8: [[SHL:%[0-9]+]]:_(s64) = G_SHL [[UV]], [[UMIN]](s32)
    ; GFX8: [[UV4:%[0-9]+]]:_(s32), [[UV5:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[SHL]](s64)
    ; GFX8: [[UMIN1:%[0-9]+]]:_(s32) = G_UMIN [[C1]], [[UV4]]
    ; GFX8: [[OR:%[0-9]+]]:_(s32) = G_OR [[UV5]], [[UMIN1]]
    ; GFX8: [[SITOFP:%[0-9]+]]:_(s32) = G_SITOFP [[OR]](s32)
    ; GFX8: [[SUB1:%[0-9]+]]:_(s32) = G_SUB [[C]], [[UMIN]]
    ; GFX8: [[INT1:%[0-9]+]]:_(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.ldexp), [[SITOFP]](s32), [[SUB1]](s32)
    ; GFX8: [[FPTRUNC:%[0-9]+]]:_(s16) = G_FPTRUNC [[INT1]](s32)
    ; GFX8: [[UV6:%[0-9]+]]:_(s32), [[UV7:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[UV1]](s64)
    ; GFX8: [[XOR1:%[0-9]+]]:_(s32) = G_XOR [[UV6]], [[UV7]]
    ; GFX8: [[ASHR1:%[0-9]+]]:_(s32) = G_ASHR [[XOR1]], [[C2]](s32)
    ; GFX8: [[ADD1:%[0-9]+]]:_(s32) = G_ADD [[C]], [[ASHR1]]
    ; GFX8: [[INT2:%[0-9]+]]:_(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.sffbh), [[UV7]](s32)
    ; GFX8: [[SUB2:%[0-9]+]]:_(s32) = G_SUB [[INT2]], [[C1]]
    ; GFX8: [[UMIN2:%[0-9]+]]:_(s32) = G_UMIN [[SUB2]], [[ADD1]]
    ; GFX8: [[SHL1:%[0-9]+]]:_(s64) = G_SHL [[UV1]], [[UMIN2]](s32)
    ; GFX8: [[UV8:%[0-9]+]]:_(s32), [[UV9:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[SHL1]](s64)
    ; GFX8: [[UMIN3:%[0-9]+]]:_(s32) = G_UMIN [[C1]], [[UV8]]
    ; GFX8: [[OR1:%[0-9]+]]:_(s32) = G_OR [[UV9]], [[UMIN3]]
    ; GFX8: [[SITOFP1:%[0-9]+]]:_(s32) = G_SITOFP [[OR1]](s32)
    ; GFX8: [[SUB3:%[0-9]+]]:_(s32) = G_SUB [[C]], [[UMIN2]]
    ; GFX8: [[INT3:%[0-9]+]]:_(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.ldexp), [[SITOFP1]](s32), [[SUB3]](s32)
    ; GFX8: [[FPTRUNC1:%[0-9]+]]:_(s16) = G_FPTRUNC [[INT3]](s32)
    ; GFX8: [[ZEXT:%[0-9]+]]:_(s32) = G_ZEXT [[FPTRUNC]](s16)
    ; GFX8: [[ZEXT1:%[0-9]+]]:_(s32) = G_ZEXT [[FPTRUNC1]](s16)
    ; GFX8: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
    ; GFX8: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[ZEXT1]], [[C3]](s32)
    ; GFX8: [[OR2:%[0-9]+]]:_(s32) = G_OR [[ZEXT]], [[SHL2]]
    ; GFX8: [[BITCAST:%[0-9]+]]:_(<2 x s16>) = G_BITCAST [[OR2]](s32)
    ; GFX8: $vgpr0 = COPY [[BITCAST]](<2 x s16>)
    %0:_(<2 x s64>) = COPY $vgpr0_vgpr1_vgpr2_vgpr3
    %1:_(<2 x s16>) = G_SITOFP %0
    $vgpr0 = COPY %1
...
